## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Tue Jun 02 15:42:57 中国标准时间 2009
##
vlib work
vlog +acc  "compare8.v"
vlog +acc  "uutcompare8.v"
vlog +acc  "zhongzhilvbo.v"
vlog +acc  "tb_zhongzhilvbo.v"
vlog +acc  "D:/Xilinx/10.1/ISE/verilog/src/glbl.v"
vsim -t 1ps   -L xilinxcorelib_ver -L unisims_ver -L unimacro_ver -lib work tb_zhongzhilvbo glbl
do {tb_zhongzhilvbo_wave.fdo}
view wave
view structure
view signals
run 1000ns
do {tb_zhongzhilvbo.udo}
