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基于FPGA高精度磁通门传感器的设计与校准研究
电子技术应用
陈启慧1,谢志远1,2,刘继志2
1.华北电力大学 电子与通信工程学院;2.河北省互感器技术创新中心
摘要: 针对宽量程电流测量中传统磁通门传感器非线性误差显著的问题,提出基于现场可编程门阵列(FPGA)高精度时间差检测与多项式动态补偿的协同校正方法。通过建立磁芯正负饱和时间差与被测电流的映射关系,构建数字化FPGA处理架构实时捕获饱和时间差,并建立包含非线性效应的多项式补偿模型。实验结果表明:该传感器能够精确检测复杂微弱漏电流;补偿模型决定系数达0.999 976,较线性模型提高0.11%;均方根误差降低85.4%。通过硬件-算法协同优化有效抑制工业现场环境下的精度漂移,为智能电网设备级电流监测提供了高精度低成本解决方案。
中图分类号:TP212.6 文献标志码:A DOI: 10.16157/j.issn.0258-7998.256811
中文引用格式: 陈启慧,谢志远,刘继志. 基于FPGA高精度磁通门传感器的设计与校准研究[J]. 电子技术应用,2025,51(12):56-61.
英文引用格式: Chen Qihui,Xie Zhiyuan,Liu Jizhi. Research on the design and calibration of high-precision fluxgate sensor based on FPGA[J]. Application of Electronic Technique,2025,51(12):56-61.
Research on the design and calibration of high-precision fluxgate sensor based on FPGA
Chen Qihui1,Xie Zhiyuan1,2,Liu Jizhi2
1.School of Electronic and Communication Engineering, North China Electric Power University;2.Hebei Transformer Technology Innovation Center
Abstract: Aiming at the problem of significant nonlinear error of traditional fluxgate sensor in wide range current measurement, a collaborative correction method based on field programmable gate array (FPGA) high-precision time difference detection and polynomial dynamic compensation is proposed. In this study, by establishing the mapping relationship between the positive and negative saturation time difference of the magnetic core and the measured current, a digital FPGA processing architecture is constructed to capture the saturation time difference in real time, and a polynomial compensation model including nonlinear effects is established. The experimental results show that this sensor can precisely detect complex and weak leakage currents. The determination coefficient R2 of the compensation model is 0.999 976, which is 0.11 percentage points higher than that of the linear model. The root mean square error is reduced by 85.4 %. Through hardware-algorithm collaborative optimization, the accuracy drift in industrial field environment is effectively suppressed, which provides a high-precision and low-cost solution for device-level current monitoring of smart grid.
Key words : FPGA;fluxgate sensor;time difference method;nonlinear compensation

引言

磁通门传感器作为高精度磁场测量技术的核心器件,在工业电流监测领域展现出独特优势。其基于电磁感应原理和软磁材料的非线性磁化特性,可实现nT级磁场分辨率,已广泛应用于新能源汽车电控系统和智能电网漏电监测等关键领域。然而,传统模拟处理架构面临信号链非线性误差的固有问题,磁芯绕线不均匀性和激励电压波动导致的磁滞非线性[1-3]。

研究显示,新型霍尔传感器依靠精密的电路设计可以把误差控制在±0.5%以内,而磁通门技术比如FDC500系列,在1 000 A冲击后仍然可保持小于0.6 A的测量误差[1,4]。但基于传统线性模型的磁通门传感器在宽量程0~200 mA的应用当中呈现出显著的非线性失真,它的残差分布呈现典型的抛物线特征,在磁芯饱和区误差会呈指数增长[5]。

当前的研究主要是从硬件架构优化与算法补偿这两个方向去突破上述的瓶颈,在硬件层面,高嵩等人基于dsPIC单片机依靠相敏检波构建三轴数字化架构[6],但需要多级滤波电路和AD转换器且对周围磁场环境要求严格;在算法层面,基于时间差的传统线性模型在面对复杂磁滞特性的时候仍然存在0.4%的残余误差[7]。而神经网络如BP网络在非线性校正中表现出很强的拟合能力[8],可是它的计算复杂度高,需要反向传播迭代而且缺乏物理可解释性,无法满足工业场景的实时性要求。

本文提出了FPGA-MATLAB算法协同校正架构,依靠硬件时间量化与软件动态补偿的深度融合来解决传统技术的局限。设计全数字化FPGA处理链,集成低抖动时钟生成和时间差量化模块,且不需要设计专门的低通滤波器电路与AD模块,与此同时,构建了多项式系数动态更新模型,非线性拟合实时修正饱和时间差与一次电流的映射关系,有效抑制了传统磁通门的固有误差。


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作者信息:

陈启慧1,谢志远1,2,刘继志2

(1.华北电力大学 电子与通信工程学院,河北 保定 071003;

2.河北省互感器技术创新中心,河北 保定 071003)


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