中图分类号： TN492 文献标识码： A DOI：10.16157/j.issn.0258-7998.211418 中文引用格式： 张自豪，赵建中，周玉梅. 基于MIPI规范的从端D-PHY数字电路设计[J].电子技术应用，2021，47(11)：33-38. 英文引用格式： Zhang Zihao，Zhao Jianzhong，Zhou Yumei. Design of slave D-PHY digital circuit based on MIPI specification[J]. Application of Electronic Technique，2021，47(11)：33-38.
Design of slave D-PHY digital circuit based on MIPI specification
Zhang Zihao1，2，Zhao Jianzhong1，Zhou Yumei1，2
1.Institute of Microelectronics，Chinese Academy of Science，Beijing 100029，China； 2.University of Chinese Academy of Sciences，Beijing 100049，China
Abstract： Based on the MIPI D-PHY version 1.1 specification, a design of slave D-PHY digital circuit is proposed, which is implemented with 4 lanes. In the high-speed mode, the data transfer rate of a single lane supports up to 1.5 Gb/s; in the low-power mode, the data transfer rate of lane 0 is up to 10 Mb/s. In the high-speed mode, the deserialization of the serial data stream is implemented by the analog circuit, and the synchronization detection of the data frame header after deserialization is realized by the digital circuit; the detection of the D-PHY entry code and the data transmission in the low-power mode are asynchronous communication and a kind of asynchronous clock implementation is proposed; SMIC 0.18 μm CMOS process library is used for synthesis, and at the typical process corner, the overall circuit area is 95 061 μm2; the overall power consumption is 4.291 mW, and the power consumption in low power mode is 231.3 μW.
Key words : MIPI；D-PHY；high speed mode；low-power mode；asynchronous clock
0 引言
早在2003年，ARM、诺基亚、德州仪器和意法半导体四家公司就预见了智能、多媒体手机的广阔市场前景，成立了移动产业处理器接口(Mobile Industry Processor Interface，MIPI)联盟[1]。目前，所有主要的芯片厂商使用MIPI规范，所有智能手机都至少使用一种MIPI规范。串行显示接口(Display Serial Interface，DSI)协议是MIPI联盟推出的针对高速显示接口的规范[2]，多用于移动终端系统[3]，其特点是高速、灵活和低功耗[4]。DSI协议架构的最低层是物理层(Physical Layer，PHY)，规范了发送端(主端)和接收端(从端)通道的电学特性和通道建立时的时序要求[5]。D-PHY规范是一种常用的兼容DSI协议的物理层规范[6]。
