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基于BIST的编译码器IP核测试
摘要: 基于IP核复用的SOC,其IP核类型和来源都不相同,即使已验证好的IP核在集成时也不能确保不出差错。IP核被集成到SOC后,其输入输出端口也嵌入到SOC,原本可测的端口失去了原有的可控性和可观测性,变得不可测。因此人们一直寻求有效的测试验证技术。本文给出了基于内建自测试方法(BIST),在设计编译码器IP核的同时,考虑其测试外壳设计,以期提高IP核可测性。
关键词: SOC IP核 编译码器
Abstract:
Key words :

1 引言

随着半导体工艺的发展,片上系统SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" 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title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC" title="SOC">SOC已成为当今一种主流技术。基于IP复用的SOC设计是通过用户自定义逻辑(UDL)和连线将IP核整合为一个系统,提高了设计效率,加快了设计过程,缩短了产品上市时间。但是随着设计规模的增大,集成密度的提高,IP引脚的增多,IP的植入深度加大必然使得测试验证工作繁重。据统计,在SOC设计中,各种内核的测试验证工作所用的时间占整个设计过程的60%~80%,SOC及IP核的测试验证已成为SOC技术发展的瓶颈。如何在最短的时间内高效迅速地通过IP核验证与测试.并把其集成在SOC中成为业界关注的焦点和研究领域急待突破与实现的方向。

基于IP核复用的SOC,其IP核类型和来源都不相同,即使已验证好的IP核在集成时也不能确保不出差错。IP核被集成到SOC后,其输入输出端口也嵌入到SOC,原本可测的端口失去了原有的可控性和可观测性,变得不可测。

因此人们一直寻求有效的测试验证技术。本文给出了基于内建自测试方法(BIST),在设计编译码器IP核的同时,考虑其测试外壳设计,以期提高IP核可测性。

2 测试结构

所谓测试,就是在被测电路的输入引脚施加相应的激励信号,然后检测输出引脚的响应,并将检测的输出引脚的响应与期望引脚的响应进行比较以判断电路是否存在故障的过程。

IP核测试的目的在于检测IP核是否存在功能和时序错误,从而对IP核进行修改,提高产品的可靠性。一般采用访问、隔离、控制的手段对IP核的输入端施加激励来得到响应与期望的响应进行比较。嵌入式IP核的测试结构如图1所示。

 

测试激励源为嵌入式IP核生成测试所需的激励。响应分析器对所得到的响应进行分析,如果相同则表明没有故障,不同则表明存在故障。测试访问机制是 SOC传送数据的一种手段,它将测试激励传送到IP核的输入端口并将测试响应从IP核的输出端口传送到响应分析器。测试外壳是IP核同访问机制及器件其他逻辑之间的接口;测试外壳以实现片上核与核之间的测试隔离,也可以为IP核提供了测试数据传送通道。

3 内建自测试原理

内建自测试是可测性设计的一种重要方法。其基本思想是让电路自己生成测试向量,而非通过外部施加测试向量,并且依靠自身判断所得到的结果是否正确。内建自测试原理图如图2所示。

其中测试外壳(wrapper)在IP核的设计之中就予以考虑。通过测试外壳外部可以控制BIST和正常模式的切换。测试外壳内部多采用边界扫描模块、移位寄存器或多路访问器等,它起到访问、隔离、控制的作用,可提高IP核的可测性。然而加入测试外壳会使IP核的面积开销增大,因此必须在IP核的可测性和面积之间进行权衡。

4 内建自测试的实现

可控性指驱动一个节点为逻辑状态0或1的难易程度;可观测性指从外部端口观察内部节点故障的难易程度;可测性就是指在整个电路全部节点的可控性和可观测性。很显然,高可测性比较容易产生测试向量并且测试效果良好。

为了提高IP核的可测性,在IP核的设计中就考虑了设计特定电路方便测试。以BIST实现IP核的测试,一般具有如下优势:简化测试接口;改善测试质量;降低测试成本;提高测试可靠性。

基于BIST的编译码器IP核测试实现框图如图3所示。

  通过测试外壳控制输入/输出寄存器将编译码器隔离使它们互不影响,正常状态和测试状态能够切换,提高了IP核的可测性。具体的实现过程如下:

(1)正常状态下原始码输入编码器,由其输出的码再进入译码器又转换为原始码;

(2)测试状态下测试外壳的测试向量输入编码器,由其输出的码直接进入译码器,由译码器输出的码为测试响应输出,使其与期望值比较;图3中的模式选择模块的逻辑结构如图4所示。


图4中mod为模式选择控制端,置0为正常状态。当rood为1时,out_sel输入测试向量,再由in_tem输出,进入in_sel;当mod 为0时,cod_out输出片外,从而实现了正常状态和测试状态的切换。可以用硬件描述语言编写此逻辑电路。用VHDL描述如下:

此模式选择模块实现状态之间的切换,电路简单,易于实现。

5 结束语

BIST为嵌入式内核的测试提供了一个可解决的方案,其测试效果明显,故障覆盖率较高,实现简单。通过加入测试外壳可以实现对IP核的访问、隔离、控制,有效地提高了IP核的可测性。但是采用BIST会使电路面积增加额外开销,必须在IP核的可测性和面积之间进行权衡。
 

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