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单电源运算放大器输出不能实现轨对轨摆动
摘要: 单电源运算放大器不能真正实现输出的轨对轨摆动。接近轨时,放大器呈现出非线性。对线性工作,单电源放大器的输出每轨都能达到50到300mV。
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  采购员谨防:输出摆幅达到最大值之前,线性就已经开始下降。

  单电源运算放大器不能真正实现输出的轨对轨摆动。接近轨时,放大器呈现出非线性。对线性工作,单电源放大器的输出每轨都能达到50到300mV(图1)。

对线性工作

  单电源放大器,轨对轨输出的广告造成安全的错觉。图1显示了驱动轨输出时,典型单电源放大器的输出摆幅。

 

  在输出摆幅达到最大值之前,放大器的线性就已经开始大幅下降,放大器输出不能达到任何电源电压。

  为使直流开环增益指标达到要求,只有假设放大器处于线性工作输出范围。直流开环增益用分贝表示为20 log(ΔVOUT/ΔVOS),其中VOUT为电压输出,VOS为输入偏置电压。驱动输出为高时,VH为输出直流开环增益测量的最大电压。VOH为相对于输出所能达到VDD的绝对电压最大值。VL为输出直流开环增益测量的最小电压,VOL为输出所能达到的绝对电压最小值。VH小于VOH,而VL大于VOL。

  从信号流的观点看,运算放大器驱动ADC时,输出限制轨对轨摆幅。图2a中FFT图显示了5V系统中,放大器结合ADC对1KHz信号的响应。放大器典型的闭环带宽约为3MHz,上升速率为2.3V/µsec。放大器输出电压在140 mV到4.66V摆动。在5V供电系统中,信号到电源的差距为140 mV。对这个放大器,VOL最小为比地电压高15 mV,而VOH最大为VDD–20 mV。

  图2a通过显示2、3、4kHz等频率下的失真,说明了单电源供电的CMOS放大器输出范围的非线性。通过减少每个轨的放大器输出信号到272 mV,在仅有ADC失真时数据理想。(图2b)

通过显示2、3、4kHz等频率下的失真,说明了单电源供电的CMOS放大器输出范围的非线性。通过减少每个轨的放大器输出信号到272 mV,在仅有ADC失真时数据理想

点击看原图

 

 

  使用单电源运放,要仔细阅读手册。一些单电源运放有输出域电荷泵,允许放大器输出摆动达到和超出供电电源轨。在任何情况下,务必要读数据手册和参考开环增益测试条件。

  英文原文:

  Single-supply amplifier outputs don't swing rail to rail

  Buyer beware: Linearity starts to degrade long before reaching the output-swing maximums.

  By Bonnie Baker -- EDN, 9/3/2007

  Single-supply amplifiers do not truly swing rail to rail at the output. Near the rail, the amplifier is nonlinear. For linear operation, the output of single-supply amplifiers can come within only 50 to 300 mV of each rail (Figure 1).

  Single-supply-amplifier, rail-to-rail-output ads can give a false sense of security. Figure 1 shows a typical single-supply amplifier’s output swing as you drive the output to the rails.

  The amplifier’s linearity starts to degrade long before reaching the output-swing maximums, and the amplifier output never reaches either rail.

  The conditions of the dc-open-loop-gain specification define the amplifier’s linear operating output range. The dc open loop gain in decibels is 20 log(ΔVOUT/ΔVOS), where VOUT is the output voltage and VOS is the input offset voltage. When you drive the output high, VH is the maximum voltage level at the output in the dc-open-loop-gain measurement. VOH is the absolute maximum voltage level with respect to VDD (drain-to-drain voltage) that the output can reach. VL is the minimum voltage level at the output in the dc-open-loop-gain measurement, and VOL is the absolute minimum voltage level that the output can reach. VH is less than VOH, and VL is greater than VOL.

 

  From a signal-chain perspective, you can see an op amp’s output limitations to swinging rail to rail when the op amp is driving an ADC. The FFT plot in Figure 2a shows the amplifier/ADC-combination response to a 1-kHz signal in a 5V system. The amplifier’s ty

 

pical closed-loop bandwidth is about 3 MHz with a typical slew rate of 2.3V/µsec. The amplifier output voltage swings from 140 mV to 4.66V. In this 5V-supply system, the headroom between the signal and rails is 140 mV. For this amplifier, the VOL minimum specification is 15 mV above ground. The VOH maximum specification is VDD–20 mV.

 

  Figure 2a illustrates the nonlinearity-output-stage effects with a single-supply CMOS amplifier by showing distortion at 2, 3, and 4 kHz and so on. By reducing the amplifier’s output signal to 272 mV from each rail, the data looks perfect with only the ADC distortion (Figure 2b).

  When using a single-supply amplifier, read the fine print! Some single-supply amps have output-stage charge pumps, allowing the amplifier’s output swing to go to and well beyond the power-supply rails. In every case, read your data sheet and refer to the conditions on the open-loop-gain test.

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