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一种超低输入共模电压的动态比较器电路设计
2021年电子技术应用第10期
杨德旺,张春华,郭春炳
广东工业大学 信息工程学院,广东 广州510006
摘要: 为了适应物联网低功耗的应用场景,并满足低电源电压和低输入共模电压的工作要求,提出了一种适用于超低输入共模电压的双正反馈回路动态比较器。该比较器采用时序开关控制输入输出,解决了传统动态比较器在输入电压低于阈值电压时无法正常工作的问题,增大了输入动态范围;电源到地之间仅堆叠两级MOS管,降低了最小电源电压;引入两个正反馈回路,提高了分辨率。采用TSMC 180 nm CMOS工艺设计和验证,仿真结果表明,在电源电压为900 mV,差模电压为1 mV情况下,提出的比较器最低共模电压为51 mV,与传统StrongARM动态比较器和DoubleTail动态比较器相比,分别降低了374 mV和264 mV;当输入共模电压低于阈值电压时,在中等的功耗下实现了最低的延时。
中图分类号: TN432
文献标识码: A
DOI:10.16157/j.issn.0258-7998.211378
中文引用格式: 杨德旺,张春华,郭春炳. 一种超低输入共模电压的动态比较器电路设计[J].电子技术应用,2021,47(10):48-52.
英文引用格式: Yang Dewang,Zhang Chunhua,Guo Chunbing. Design of a dynamic comparator circuit for ultra-low input common-mode voltage[J]. Application of Electronic Technique,2021,47(10):48-52.
Design of a dynamic comparator circuit for ultra-low input common-mode voltage
Yang Dewang,Zhang Chunhua,Guo Chunbing
School of Information Engineering,Guangdong University of Technology,Guangzhou 510006,China
Abstract: In order to adapt to the application scenarios of low power consumption in the Internet of Things, and meet the requirements of low power supply and low input common-mode voltage, this paper proposes a dynamic comparator, with dual-positive feedback loop, suitable for ultra-low input common-mode voltage. The comparator uses a timing switch to control the input and output, which solves the problem that the traditional dynamic comparator cannot work properly when the input voltage is lower than the threshold voltage, and increases the input dynamic range. Only two MOS devices are stacked in series between the power supply and the ground, which reduces the minimum power supply voltage. Two positive feedback loops are introduced to improve the resolution. TSMC 180 nm CMOS process is used to design and verify the proposed comparator. The simulation results show that the lowest common mode voltage of the proposed comparator is 51 mV when the power supply voltage is 900 mV and the differential mode voltage is 1 mV, which is 374 mV and 264 mV lower than the traditional StrongARM and DoubleTail dynamic comparators, respectively. When the input common-mode voltage is lower than the threshold voltage, it achieves best delay among three topologies at moderate power consumption.
Key words : dynamic comparator;low input common-mode voltage;low power comparator

0 引言

    随着物联网低功耗应用的逐渐兴起,系统供电电压逐渐降低,要求便携式设备和无线传感器网络能够在电源电压和输入共模电压都更低的条件下正常工作。比较器电路是SAR ADC等电路系统中的关键电路模块,其性能的好坏对系统有重要的影响[1-6]

    常用的比较器包括开环比较器和动态锁存比较器。动态锁存比较器相较于开环比较器具有无静态功耗、速度较快和精度较高等优点,因此取得了更广泛应用[7-8]

    StrongARM比较器具有低功耗的优势,但分辨率较低,且输入共模范围较小。DoubleTail比较器的分辨率和输入共模范围相比于StrongARM比较器有了一定的提高,但代价是更高的功耗,尤其当输入电压较低时会发生漏电,造成功耗急剧增加。因此设计一种同时满足低功耗、高分辨率和宽共模输入范围的动态比较器具有较强的实用意义[9-11]




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作者信息:

杨德旺,张春华,郭春炳

(广东工业大学 信息工程学院,广东 广州510006)




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